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1 for more information www.linear.com/LT8614 typical a pplica t ion fea t ures descrip t ion 42v, 4a synchronous step-down silent switcher with 2.5a quiescent current the lt ? 8614 step-down regulator features silent switcher architecture designed to minimize emi/emc emissions while delivering high efficiency at frequencies up to 3mhz. assembled in a 3 mm 4 mm qfn, the monolithic construc - tion with integrated power switches and inclusion of all necessar y circuitry yields a solution with a minimal pcb footprint. an ultralow 2.5 a quiescent currentwith the output in full regulation enables applications requiring highest efficiency at very small load currents. transient response remains excellent and output voltage ripple is below 10mv p-p at any load, from zero to full current. the LT8614 allows high v in to low v out conversion at high frequency with a fast minimum top switch on-time of 30ns. operation is safe in overload even with a saturated inductor. essential features are included and easy to use: an open- drain pg pin signals when the output is in regulation. the sync pin allows clock synchronization and choice of burst mode operation or pulse-skipping mode. soft-start and tracking functionality is accessed via the tr/ss pin. an accurate enable threshold can be set using the en/uv pin and a resistor at the rt pin programs switch frequency. 5v 4a step-down converter 12v in to 5v out efficiency a pplica t ions n silent switcher? architecture: ultralow emi/emc emissions n high efficiency at high frequency up to 96% efficiency at 1mhz up to 94% efficiency at 2mhz n wide input voltage range: 3.4v to 42v n ultralow quiescent current burst mode ? operation: 2.5 a i q regulating 12v in to 3.3v out output ripple < 10mv p-p n fast minimum switch-on time: 30ns n low dropout under all conditions: 200mv at 1a n safely tolerates inductor saturation in overload n adjustable and synchronizable: 200khz to 3mhz n peak current mode operation n accurate 1v enable pin threshold n internal compensation n output soft-start and tracking n small 18-lead 3mm 4mm qfn n automotive and industrial supplies n general purpose step-down n gsm power supplies l, lt , lt c , lt m , linear technology, the linear logo and burst mode are registered trademarks and silent switcher is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. v in2 v in1 en/uv pg LT8614 8614 ta01a bst sync/mode sw tr/ss bias intv cc fb rt gnd 1f 0.1f 4.7pf 47f 1m v out 5v 4a 1f 4.7f v in 5.8v to 42v 10nf 41.2k 1f 4.7h 243k gnd2 gnd1 f sw = 1mhz load current (a) 0 efficiency (%) 80 90 4.0 8614 ta01b 70 60 1.0 2.0 3.0 0.5 1.5 2.5 3.5 100 1mhz 2mhz 75 85 65 95 LT8614 8614fa
2 for more information www.linear.com/LT8614 p in c on f igura t ion a bsolu t e maxi m u m r a t ings v in , en / uv , pg .......................................................... 42 v b ias .......................................................................... 30 v bs t pin above sw pin ................................................4v fb , tr / ss , rt, intv cc . .............................................. 4v syn c voltage . ............................................................ 6 v operating junction temperature range ( note 2) lt 86 14 e ............................................. C4 0 c to 125 c lt 86 14 i .............................................. C4 0 c to 125 c storage temperature range ...................... C 65 to 150 c (note 1) e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range LT8614eudc#pbf LT8614eudc#trpbf lggq 18-lead (3mm 4mm) plastic qfn C40c to 125c LT8614iudc#pbf LT8614iudc#trpbf lggq 18-lead (3mm 4mm) plastic qfn C40c to 125c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult lt c marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ parameter conditions min typ max units minimum input voltage l 2.9 3.4 v v in quiescent current v en/uv = 0v l 1.0 1.0 3 8 a a v en/uv = 2v, not switching, v sync = 0v l 1.7 1.7 4 10 a a v en/uv = 2v, not switching, v sync = 2v 0.26 0.5 ma v in current in regulation v out = 0.97v, v in = 6v, output load = 100a v out = 0.97v, v in = 6v, output load = 1ma l l 21 210 50 350 a a feedback reference v oltage v in = 6v, i load = 0.5a v in = 6v, i load = 0.5a l 0.964 0.958 0.970 0.970 0.976 0.982 v v feedback v oltage line regulation v in = 4.0v to 42v, i load = 0.5a l 0.004 0.02 %/v feedback pin input current v fb = 1v C20 20 na 20 19 18 17 7 8 9 10 top view udc package 18-lead (3mm 4mm) plastic qfn 1 bias intv cc bst v in1 gnd1 tr/ss rt en/uv vin2 gnd2 gnd1 sw sw gnd2 fb pg gnd sync/mode 16 15 14 13 11 2 3 4 6 21 sw 22 sw ja = 40c/w, jc( pad ) = 12c/w exposed pad ( pins 21, 22) are sw, should be soldered to pcb note: pins 5, 12 are removed. configura tion does not match jedec 20-pin package outline LT8614 8614fa
3 for more information www.linear.com/LT8614 e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LT8614e is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. the LT8614i is guaranteed over the full C40c to 125c operating junction temperature range. operating lifetime is derated at junction temperatures greater than 125c. the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. parameter conditions min typ max units intv cc voltage i load = 0ma, v bias = 0v i load = 0ma, v bias = 3.3v 3.23 3.25 3.4 3.29 3.57 3.35 v v intv cc undervoltage lockout 2.5 2.6 2.7 v bias pin current consumption v bias = 3.3v, i load = 1a, 2mhz 9 ma minimum on-time i load = 1a, sync = 0v i load = 1a, sync = 3.3v l l 15 15 30 30 45 45 ns ns minimum off-t ime 80 110 ns oscillator frequency r t = 221k, i load = 1a r t = 60.4k, i load = 1a r t = 18.2k, i load = 1a l l l 180 665 1.85 210 700 2.00 240 735 2.15 khz khz mhz to p power nmos on-resistance i sw = 1a 85 m top power nmos current limit l 5.7 8.5 10 a bottom power nmos on-resistance v intvcc = 3.4v, i sw = 1a 40 m bottom power nmos current limit v intvcc = 3.4v l 4.5 6.9 8.5 a sw leakage current v in = 42v, v sw = 0v, 42v C1.5 1.5 a en/uv pin threshold en/uv rising l 0.94 1.0 1.06 v en/uv pin hysteresis 40 mv en/uv pin current v en/uv = 2v C20 20 na pg upper threshold offset from v fb v fb falling l 6 9.0 12 % pg lower threshold offset from v fb v fb rising l C6 C9.0 C12 % pg hysteresis 1.2 % pg leakage v pg = 3.3v C40 40 na pg pull-down resistance v pg = 0.1v l 650 2000 sync threshold sync falling sync rising 0.8 1.6 1.1 2.0 1.4 2.4 v v sync pin current v sync = 6v C40 40 na tr/ss source current l 1.5 2.2 2.9 a tr/ss pull-down resistance fault condition, tr/ss = 0.1v 200 note 3: this ic includes overtemperature protection that is intended to protect the device during overload conditions. junction temperature will exceed 150c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature will reduce lifetime. LT8614 8614fa
4 for more information www.linear.com/LT8614 typical p er f or m ance c harac t eris t ics efficiency at 3.3v out efficiency vs frequency burst mode efficiency vs inductor value reference voltage en pin thresholds load regulation efficiency at 5v out efficiency at 3.3v out efficiency at 5v out load current (a) 0 50 efficiency (%) 55 65 70 75 100 85 1 2 2.5 8614 g01 60 90 95 80 0.5 1.5 3 3.5 4 v in = 12v v in = 24v v in = 36v f sw = 1mhz l = 4.7h load current (a) 0 50 efficiency (%) 55 65 70 75 100 85 1 2 8614 g02 60 90 95 80 3 0.5 1.5 2.5 3.5 4 v in = 12v v in = 24v v in = 36v f sw = 1mhz l = 2.2h load current (ma) 0.01 0.1 40 efficiency (%) 50 60 70 80 1 10 100 1000 8614 g03 30 20 10 0 90 100 v in = 12v v in = 24v v in = 36v f sw = 1mhz l = 4.7h load current (ma) 0.01 0.1 40 efficiency (%) 50 60 70 80 1 10 100 1000 8614 g04 30 20 10 0 90 100 v in = 12v v in = 24v v in = 36v f sw = 1mhz l = 4.7h switching frequency (mhz) 0.25 98 96 94 92 90 88 86 84 1.75 2.75 8614 g05 0.75 1.25 2.25 efficiency (%) v out = 5v i load = 1a l = 8.6h v in = 12v v in = 24v inductor value (h) 0 65 efficiency (%) 70 75 80 85 90 95 2 4 6 8 8614 g06 10 v out = 5v i load = 10ma v in = 12v v in = 24v temperature (c) ?50 reference volage (v) 0.971 0.973 0.975 150 8614 g07 0.969 0.967 0.965 0.961 0 50 100 ?25 25 75 125 0.963 0.979 0.977 temperature (c) ?50 en threshold (v) 0.99 1.01 150 8614 g08 0.97 0.95 0 50 100 ?25 25 75 125 1.03 0.98 1.00 0.96 1.02 en rising en falling load current (a) 0 ?0.15 change in v out (%) ?0.10 ?0.05 0 0.05 1 2 3 4 8614 g09 0.10 0.15 0.5 1.5 2.5 3.5 v out = 5v v in = 12v LT8614 8614fa
5 for more information www.linear.com/LT8614 typical p er f or m ance c harac t eris t ics top fet current limit vs duty cycle top fet current limit bottom fet current limit switch drop minimum on-time switch drop line regulation no-load supply current no-load supply current input voltage (v) 5 ?0.10 change in v out (%) ?0.08 ?0.04 ?0.02 0 0.10 0.04 15 25 30 8614 g10 ?0.06 0.06 0.08 0.02 10 20 35 40 45 v out = 5v i load = 1a input voltage (v) 0 0 input current (a) 0.5 1.5 2.0 2.5 5.0 3.5 10 20 25 45 8614 g11 1.0 4.0 4.5 3.0 5 15 30 35 40 v out = 3.3v in regulation temperature (c) ?55 ?25 0 input current (a) 10 25 5 65 95 8614 g12 5 20 15 35 125 155 v out = 3.3v v in = 12v in regulation temperature (c) ?50 current limit (a) 6.0 6.5 7.0 100 125 25 50 75 8614 g15 5.5 5.0 ?25 0 150 4.5 4.0 7.5 duty cycle 0 6.0 current limit (a) 6.5 7.0 7.5 8.0 8.5 9.0 0.2 0.4 0.6 0.8 8614 g13 1.0 temperature (c) ?50 6.0 current limit (a) 6.5 7.5 8.0 8.5 9.5 ?25 75 125 8614 g14 7.0 9.0 50 150 0 25 100 5% dc temperature (c) ?50 switch drop (mv) 100 150 150 8614 g16 50 0 0 50 100 ?25 25 75 125 200 75 125 25 175 switch current = 1a top switch bottom switch switch current (a) 0 0 switch drop (mv) 50 150 200 250 500 350 1 2 8614 g17 100 400 450 300 3 4 top switch bottom switch temperature (c) ?50 20 minimum on-time (ms) 22 26 28 30 40 34 0 50 75 100 8614 g18 24 36 38 32 ?25 25 125 i load = 1a, v sync = 0v i load = 1a, v sync = 3v i load = 2a i load = 4a LT8614 8614fa
6 for more information www.linear.com/LT8614 typical p er f or m ance c harac t eris t ics dropout voltage switching frequency burst frequency frequency foldback minimum load to full frequency (sync dc high) soft-start tracking soft-start current pg high thresholds pg low thresholds load current (a) 0 dropout voltage (mv) 400 600 4 8614 g19 200 0 1 2 3 0.5 1.5 2.5 3.5 800 300 500 100 700 temperature (c) ?50 switching frequency (khz) 730 25 8614 g20 700 680 ?25 0 50 670 660 740 r t = 60.4k 720 710 690 75 100 150125 load current (ma) 0 0 switching frequency (khz) 200 400 600 800 1000 1200 50 100 150 200 8614 g21 front page application v in = 12v v out = 5v input voltage (v) 5 load current (ma) 60 80 100 20 30 45 8614 g22 40 20 0 10 15 25 35 40 front page application v out = 5v f sw = 1mhz fb voltage (v) 0 switching frequency (khz) 300 400 500 0.6 1 8614 g23 200 100 0 0.2 0.4 0.8 600 700 800 v out = 3.3v v in = 12v v sync = 0v r t = 60.4k tr/ss voltage (v) 0 fb voltage (v) 0.8 1.0 1.2 0.6 1.0 8614 g24 0.6 0.4 0.2 0.4 0.8 1.2 1.4 0.2 0 temperature (c) ?50 ss pin current (a) 2.2 2.4 150 8614 g25 2.0 1.8 0 50 100 ?25 25 75 125 2.6 2.1 2.3 1.9 2.5 temperature (c) ?50 7.0 pg threshold offset from v ref (%) 7.5 8.5 9.0 9.5 12.0 10.5 0 50 75 100 8614 g26 8.0 11.0 11.5 10.0 ?25 25 150125 fb rising fb falling temperature (c) ?50 ?12.0 pg threshold offset from v ref (%) ?11.5 ?10.5 ?10.0 ?9.5 ?7.0 ?8.5 0 50 75 100 125 8614 g27 ?11.0 ?8.0 ?7.5 ?9.0 ?25 25 150 fb rising fb falling LT8614 8614fa
7 for more information www.linear.com/LT8614 typical p er f or m ance c harac t eris t ics rt programmed switching frequency v in uvlo bias pin current bias pin current switching waveforms, full frequency continuous operation transient response; load current stepped from 1a to 2a transient response; load current stepped from 100ma (burst mode operation) to 1.1a switching waveforms, burst mode operation switching waveforms switching frequency (khz) 0.2 rt pin resistor (k) 150 200 250 1.8 8614 g27 100 50 125 175 225 75 25 0 0.6 1 1.4 2.2 2.6 3 temperature (c) ?55 input voltage (v) 3.4 35 8614 g29 2.8 2.4 ?25 5 65 2.2 2.0 3.6 3.2 3.0 2.6 95 125 155 input voltage (v) 5 bias pin current (ma) 4.0 5.0 45 8614 g30 3.0 15 25 35 10 20 30 40 6.0 3.5 4.5 2.5 5.5 v bias = 5v v out = 5v i load = 1a f sw = 700khz switching frequency (mhz) 0.2 8 10 14 1.4 2.2 8614 g31 6 4 0.6 1 1.8 2.6 3 2 0 12 bias pin current (ma) v bias = 5v v out = 5v v in = 12v i load = 1a i l 500ma/div v sw 5v/div v out 5mv/div 500ns/div front page application 12v in to 5v out at 1a 8614 g32 i l 500ma/div v sw 5v/div v out 10mv/div 5s/div front page application 12v in to 5v out at 10ma v sync = 0v 8614 g33 i l 500ma/div v sw 5v/div 200ns/div front page application 36v in to 5v out at 1a 8614 g34 i load 1a/div v out 100mv/div 50s/div front page application 1a to 2a transient 12v in , 5v out c out = 47f 8614 g35 i load 1a/div v out 200mv/div 50s/div front page application 100ma (burst mode operation) to 1.1a transient 12v in , 5v out c out = 47f 8614 g36 LT8614 8614fa
8 for more information www.linear.com/LT8614 frequency (mhz) 0 amplitude (dbv/m) 30 40 50 800 20 10 0 100 200 300 400 500 600 700 900 1000 frequency (mhz) dc2019a demo board (with emi filter installed) 14v in to 5v out at 4a, f sw = 2mhz 0 amplitude (dbv/m) 30 40 50 800 8614 g39 20 10 0 100 200 300 400 500 600 700 900 1000 vertical polarization horizontial polarization LT8614 class 5 peak LT8614 class 5 peak typical p er f or m ance c harac t eris t ics start-up dropout performance radiated emi performance (cispr25 radiated emission test with class 5 peak limits) start-up dropout performance v in 2v/div v out 2v/div 100ms/div 2.5 load (2a in regulation) 8614 g37 v in v out v in 2v/div v out 2v/div 100ms/div 20 load (250ma in regulation) 8614 g38 v in v out LT8614 8614fa
9 for more information www.linear.com/LT8614 p in func t ions bias (pin 1): the internal regulator will draw current from bias instead of v in when bias is tied to a voltage higher than 3.1 v. for output voltages of 3.3 v and above this pin should be tied to v out . if this pin is tied to a supply other than v out use a 1f local bypass capacitor on this pin. intv cc (pin 2): internal 3.4 v regulator bypass pin. the internal power drivers and control circuits are powered from this voltage. intv cc maximum output current is 20ma. do not load the intv cc pin with external circuitry. intv cc current will be supplied from bias if bias > 3.1v , otherwise current will be drawn from v in . voltage on intv cc will vary between 2.8 v and 3.4 v when bias is between 3.0v and 3.6 v. decouple this pin to power ground with at least a 1f low esr ceramic capacitor placed close to the ic. bst (pin 3): this pin is used to provide a drive voltage, higher than the input voltage, to the topside power switch. place a 0.1 f boost capacitor as close as possible to the ic. v in1 (pin 4): the LT8614 requires two 1 f small input bypass capacitors. one 1 f capacitor should be placed between v in1 and gnd1. a second 1 f capacitor should be placed between v in2 and gnd2. these capacitors must be placed as close as possible to the LT8614. a third larger capacitor of 2.2 f or more should be placed close to the LT8614 with the positive terminal connected to v in1 and v in2 , and the negative terminal connected to ground. see applications section for sample layout. gnd1 (6, 7): power switch ground. these pins are the return path of the internal bottom side power switch and must be tied together. place the negative terminal of the input capacitor as close to the gnd1 pins as possible. also be sure to tie gnd1 to the ground plane. see the applica - tions information section for sample layout. sw ( pins 8, 9): the sw pins are the outputs of the internal power switches. tie these pins together and connect them to the inductor and boost capacitor. this node should be kept small on the pcb for good performance and low emi. gnd2 (10, 11): power switch ground. these pins are the return path of the internal bottom side power switch and must be tied together. place the negative terminal of the input capacitor as close to the gnd2 pins as possible. also be sure to tie gnd2 to the ground plane. see the applica - tions information section for sample layout. v in2 ( pin 13): the LT8614 requires two 1 f small input bypass capacitors. one 1 f capacitor should be placed between v in1 and gnd1. a second 1 f capacitor should be placed between v in2 and gnd2. these capacitors must be placed as close as possible to the LT8614. a third larger capacitor of 2.2 f or more should be placed close to the LT8614 with the positive terminal connected to v in1 and v in2 , and the negative terminal connected to ground. see the applications information section for sample layout. en/uv (pin 14): the LT8614 is shut down when this pin is low and active when this pin is high. the hysteretic threshold voltage is 1.00 v going up and 0.96 v going down. tie to v in if the shutdown feature is not used. an external resistor divider from v in can be used to program a v in threshold below which the LT8614 will shut down. rt (pin 15): a resistor is tied between rt and ground to set the switching frequency. tr /ss ( pin 16): output tracking and soft-start pin. this pin allows user control of output voltage ramp rate during start-up. a tr/ss voltage below 0.97 v forces the LT8614 to regulate the fb pin to equal the tr/ss pin voltage. when tr/ss is above 0.97 v, the tracking function is disabled and the internal reference resumes control of the error amplifier. an internal 2.2 a pull-up current from intv cc on this pin allows a capacitor to program output voltage slew rate. this pin is pulled to ground with an internal 230 mosfet during shutdown and fault conditions; use a series resistor if driving from a low impedance output. this pin may be left floating if the tracking function is not needed. LT8614 8614fa
10 for more information www.linear.com/LT8614 b lock diagra m + + ? + ? slope comp internal 0.97v ref oscillator 200khz to 2.2mhz burst detect 3.4v reg m1 m2 c bst c out v out 8614 bd sw l bst 8, 9, 21, 22 switch logic and anti- shoot through error amp shdn 9% v c shdn tsd intv cc uvlo v in uvlo shdn tsd v in uvlo en/uv 1v + ? 14 4 3 18 gnd intv cc 2 bias 1 v in2 13 gnd1 6, 7 gnd2 10, 11 pg 19 fb r1c1 r3 opt r4 opt r2 r t c ss opt v out 20 tr/ss 2.2a 16 rt 15 sync/mode 17 v in1 v in c in1 c in3 c vcc c in2 p in func t ions sync/mode (pin 17): external clock synchronization input. ground this pin for low ripple burst mode operation at low output loads. tie to a clock source for synchroniza - tion to an external frequency. apply a dc voltage of 3 v or higher or tie to intv cc for pulse-skipping mode. when in pulse-skipping mode, the i q will increase to several hundred a. do not float this pin. gnd (pins 18): LT8614 ground pin. connect this pin to system ground and to the ground plane. pg (pin 19): the pg pin is the open-drain output of an internal comparator. pg remains low until the fb pin is within 9% of the final regulation voltage, and there are no fault conditions. pg is valid when v in is above 3.4v, regardless of en/uv pin state. fb (pin 20): the LT8614 regulates the fb pin to 0.970v. connect the feedback resistor divider tap to this pin. also, connect a phase lead capacitor between fb and v out . typically, this capacitor is 4.7pf to 22pf. sw ( exposed pad pins 21, 22): the exposed pads should to connected and soldered to the sw trace for good thermal performance. if necessary due to manufacturing limita - tions pins 21 and 22 may be left disconnected, however thermal performance will be degraded. LT8614 8614fa
11 for more information www.linear.com/LT8614 o pera t ion the LT8614 is a monolithic, constant frequency, current mode step-down dc/dc converter. an oscillator, with frequency set using a resistor on the rt pin, turns on the internal top power switch at the beginning of each clock cycle. current in the inductor then increases until the top switch current comparator trips and turns off the top power switch. the peak inductor current at which the top switch turns off is controlled by the voltage on the internal vc node. the error amplifier servos the vc node by comparing the voltage on the v fb pin with an internal 0.97 v reference. when the load current increases it causes a reduction in the feedback voltage relative to the reference leading the error amplifier to raise the vc voltage until the average inductor current matches the new load current . when the top power switch turns off, the synchronous power switch turns on until the next clock cycle begins or inductor current falls to zero. if overload conditions result in more than 6.9 a flowing through the bottom switch, the next clock cycle will be delayed until switch current returns to a safe level. if the en/uv pin is low, the lt 8614 is shut down and draws 1 a from the input. when the en/uv pin is above 1v, the switching regulator will become active. to optimize efficiency at light loads, the LT8614 operates in burst mode operation in light load situations. between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 1.7a. in a typical application , 2.5 a will be consumed from the input supply when regulating with no load. the sync pin is tied low to use burst mode operation and can be tied to a logic high to use pulse-skipping mode. if a clock is applied to the sync pin the part will synchronize to an external clock frequency and operate in pulse-skipping mode. while in pulse- skipping mode the oscillator operates continuously and positive sw transitions are aligned to the clock. during light loads, switch pulses are skipped to regulate the output and the quiescent current will be several hundred a. to improve efficiency across all loads, supply current to internal circuitry can be sourced from the bias pin when biased at 3.3v or above. else, the internal circuitry will draw current from v in . the bias pin should be connected to v out if the LT8614 output is programmed at 3.3 v or above. comparators monitoring the fb pin voltage will pull the pg pin low if the output voltage varies more than 9% ( typical) from the set point, or if a fault condition is present. the oscillator reduces the LT8614s operating frequency when the voltage at the fb pin is low. this frequency foldback helps to control the inductor current when the output voltage is lower than the programmed value which occurs during start-up or overcurrent conditions. when a clock is applied to the sync pin or the sync pin is held dc high, the frequency foldback is disabled and the switching frequency will slow down only during overcur - rent conditions. LT8614 8614fa
12 for more information www.linear.com/LT8614 a pplica t ions i n f or m a t ion low emi pcb layout the LT8614 is specifically designed to minimize emi/emc emissions and also to maximize efficiency when switching at high frequencies. for optimal performance the LT8614 requires the use of multiple v in bypass capacitors. tw o small 1 f capacitors should be placed as close as possible to the LT8614: one capacitor should be tied to v in1 /gnd1; a second capacitor should be tied to v in2 / gnd2. a third capacitor with a larger value , 2.2 f or higher, should be placed near v in1 or v in2 . see figure 1 for a recommended pcb layout. for more detail and pcb design files refer to the demo board guide for the LT8614. note that large, switched currents flow in the LT8614 v in1 , v in2 , gnd1, and gnd2 pins and the input capacitors (c in1 , c in2 ). the loops formed by the input capacitors should be as small as possible by placing the capacitors adjacent to the v in1/2 and gnd1/2 pins. capacitors with small case size such as 0603 are optimal due to lowest parasitic inductance. the input capacitors, along with the inductor and output capacitors, should be placed on the same side of the cir cuit board, and their connections should be made on that layer. place a local, unbroken ground plane under the application circuit on the layer closest to the surface layer. the sw and boost nodes should be as small as possible. finally, keep the fb and rt nodes small so that the ground figure 1. recommended pcb layout for the LT8614 v v v v v v 1 6 11 16 ground plane on layer 2 20 r1 r2 c vcc c bst c in1 c in2 c in3 c out l r t c ss c1 r pg 17 7 10 22 21 ground via v in via v out via other signal vias 9614 f01 v LT8614 8614fa
13 for more information www.linear.com/LT8614 a pplica t ions i n f or m a t ion traces will shield them from the sw and boost nodes. the exposed pad on the bottom of the package should be soldered to sw to reduce thermal resistance to ambient. to keep thermal resistance low, extend the ground plane from gnd1 and gnd2 as much as possible, and add thermal vias to additional ground planes within the circuit board and on the bottom side. achieving ultralow quiescent current to enhance efficiency at light loads, the LT8614 operates in low ripple burst mode operation, which keeps the out - put capacitor charged to the desired output voltage while minimizing the input quiescent current and minimizing output voltage ripple. in burst mode operation the LT8614 delivers single small pulses of current to the output capaci - tor followed by sleep periods where the output power is supplied by the output capacitor. while in sleep mode the LT8614 consumes 1.7a. as the output load decreases, the frequency of single cur - rent pulses decreases ( see figure 2 a) and the percentage of time the LT8614 is in sleep mode increases, resulting in much higher light load efficiency than for typical convert - ers. by maximizing the time between pulses, the converter q uiescent current approaches 2.5 a f or a typical application when there is no output load. therefore, to optimize the quiescent current performance at light loads, the current in the feedback resistor divider must be minimized as it appears to the output as load current. in order to achieve higher light load efficiency, more energy must be delivered to the output during the single small pulses in burst mode operation such that the LT8614 can stay in sleep mode longer between each pulse. this can be achieved by using a larger value inductor (i.e., 4.7 h), and should be considered independent of switching frequency when choosing an inductor. for example, while a lower inductor value would typically be used for a high switch - ing frequency application, if high light load efficiency is desired, a higher inductor value should be chosen. see curve in typical performance characteristics. while in burst mode operation the current limit of the top switch is approximately 500 ma resulting in output voltage ripple shown in figure 3. increasing the output capacitance will decrease the output ripple proportionally. as load ramps upward from zero the switching frequency will increase but only up to the switching frequency programmed by the resistor at the rt pin as shown in figure 2 a. the out- put load at which the LT8614 reaches the programmed frequency varies based on input voltage, output voltage, and inductor choice. figure 2. sw frequency vs load information in burst mode operation (2a) and pulse-skipping mode (2b) minimum load to full frequency (sync dc high) burst frequency (2a) (2b) load current (ma) 0 0 switching frequency (khz) 200 400 600 800 1000 1200 50 100 150 200 8614 f02a front page application v in = 12v v out = 5v input voltage (v) 5 load current (ma) 60 80 100 20 30 45 8614 f02b 40 20 0 10 15 25 35 40 front page application v out = 5v f sw = 1mhz LT8614 8614fa
14 for more information www.linear.com/LT8614 a pplica t ions i n f or m a t ion for some applications it is desirable for the LT8614 to operate in pulse-skipping mode, offering two major differ- ences from burst mode operation. first is the clock stays awake at all times and all switching cycles are aligned to the clock. in this mode much of the internal circuitry is awake at all times, increasing quiescent current to several hundred a. second is that full switching frequency is reached at lower output load than in burst mode operation (see figure 2b). to enable pulse-skipping mode, the sync pin is tied high either to a logic output or to the intv cc pin. when a clock is applied to the sync pin the LT8614 will also operate in pulse-skipping mode. fb resistor network the output voltage is programmed with a resistor divider between the output and the fb pin. choose the resistor values according to: r1 = r2 v out 0.970v ? 1 ? ? ? ? ? ? (1) reference designators refer to the block diagram . 1% resistors are recommended to maintain output voltage accuracy. if low input quiescent current and good light - load efficiency are desired, use large resistor values for the fb resistor divider. the current flowing in the divider acts as a load current, and will increase the no-load input current to the converter, which is approximately: i q = 1.7a + v out r1 + r2 ? ? ? ? ? ? v out v in ? ? ? ? ? ? 1 n ? ? ? ? ? ? (2) where 1.7 a is the quiescent current of the LT8614 and the second term is the current in the feedback divider reflected to the input of the buck operating at its light load efficiency n. for a 3.3 v application with r1 = 1 m and r2 = 412 k, the feedback divider draws 2.3 a. with v in = 12v and n = 80%, this adds 0.8 a to the 1.7 a quiescent current resulting in 2.5 a no-load current from the 12v supply. note that this equation implies that the no-load current is a function of v in ; this is plotted in the typical performance characteristics section. when using large fb resistors, a 4.7 pf to 22 pf phase-lead capacitor should be connected from v out to fb. setting the switching frequency the LT8614 uses a constant frequency pwm architecture that can be programmed to switch from 200 khz to 3mhz by using a resistor tied from the rt pin to ground. a table showing the necessary r t value for a desired switching frequency is in table 1. the r t resistor required for a desired switching frequency can be calculated using: r t = 46.5 f sw ? 5.2 (3) where r t is in k and f sw is the desired switching fre- quency in mhz. figure 3. burst mode operation i l 500ma/div v sw 5v/div v out 10mv/div 5s/div front page application 12v in to 5v out at 10ma v sync = 0v 8614 f03 LT8614 8614fa
15 for more information www.linear.com/LT8614 a pplica t ions i n f or m a t ion table 1. sw frequency vs r t value f sw (mhz) r t (k) 0.2 232 0.3 150 0.4 110 0.5 88.7 0.6 71.5 0.7 60.4 0.8 52.3 1.0 41.2 1.2 33.2 1.4 28.0 1.6 23.7 1.8 20.5 2.0 18.2 2.2 15.8 3.0 10.7 operating frequency selection and trade-offs selection of the operating frequency is a trade-off between efficiency, component size, and input voltage range. the advantage of high frequency operation is that smaller induc - tor and capacitor values may be used. the disadvantages are lower efficiency and a smaller input voltage range. the highest switching frequency (f sw(max) ) for a given application can be calculated as follows: f sw(max) = v out + v sw(bot) t on(min) v in ? v sw(top) + v sw(bot) ( ) (4) where v in is the typical input voltage, v out is the output voltage, v sw(top) and v sw(bot) are the internal switch drops (~0.3v, ~0.15 v, respectively at maximum load) and t on(min) is the minimum top switch on-time ( see the electrical characteristics). this equation shows that a slower switching frequency is necessary to accommodate a high v in /v out ratio. for transient operation, v in may go as high as the abso- lute maximum rating of 42 v regardless of the r t value, however the LT8614 will reduce switching frequency as necessary to maintain control of inductor current to as - sure safe operation. the LT8614 is capable of a maximum duty cycle of greater than 99%, and the v in -to-v out dropout is limited by the r ds(on) of the top switch. in this mode the LT8614 skips switch cycles, resulting in a lower switching frequency than programmed by rt . for applications that cannot allow deviation from the pro - grammed switching frequency at low v in /v out ratios use the following formula to set switching frequency: v in(min) = v out + v sw(bot) 1? f sw t off(min) ? v sw(bot) + v sw(top) (5) where v in(min) is the minimum input voltage without skipped cycles, v out is the output voltage, v sw(top) and v sw(bot) are the internal switch drops (~0.3v, ~0.15v, respectively at maximum load), f sw is the switching fre- quency ( set by rt ), and t off(min) is the minimum switch off- time. note that higher switching frequency will increase the minimum input voltage below which cycles will be dropped to achieve higher duty cycle. inductor selection and maximum output current the LT8614 is designed to minimize solution size by allowing the inductor to be chosen based on the output load requirements of the application. during overload or short-circuit conditions the LT8614 safely tolerates opera - tion with a saturated inductor through the use of a high speed peak-current mode ar chitecture. a good first choice for the inductor value is: l = v out + v sw(bot) f sw (6) where f sw is the switching frequency in mhz, v out is the output voltage, v sw(bot) is the bottom switch drop (~0.15v) and l is the inductor value in h. to avoid overheating and poor efficiency, an inductor must be chosen with an rms current rating that is greater than the maximum expected output load of the application. in addition, the saturation current ( typically labeled i sat ) rating of the inductor must be higher than the load current plus 1/2 of in inductor ripple current: i l(peak) = i load(max) + 1 2 i l (7) LT8614 8614fa
16 for more information www.linear.com/LT8614 a pplica t ions i n f or m a t ion where ?i l is the inductor ripple current as calculated in equation 9 and i load(max) is the maximum output load for a given application. as a quick example, an application requiring 1 a output should use an inductor with an rms rating of greater than 1a and an i sat of greater than 1.3 a. during long duration overload or short-circuit conditons, the inductor rms rating requirement is greater to avoid overheating of the inductor. to keep the efficiency high, the series resistance (dcr) should be less than 0.04, and the core material should be intended for high frequency applications. the LT8614 limits the peak switch current in order to protect the switches and the system from overload faults. the top switch current limit (i lim ) is at least 8.5 a at low duty cycles and decreases linearly to 7.2 a at dc = 0.8. the inductor value must then be sufficient to supply the desired maximum output current (i out(max) ), which is a function of the switch current limit (i lim ) and the ripple current. i out(max) = i lim ? i l 2 (8) the peak-to-peak ripple current in the inductor can be calculated as follows: i l = v out l f sw 1? v out v in(max) ? ? ? ? ? ? (9) where f sw is the switching frequency of the LT8614, and l is the value of the inductor. therefore, the maximum output current that the LT8614 will deliver depends on the switch current limit, the inductor value, and the input and output voltages. the inductor value may have to be increased if the inductor ripple current does not allow sufficient maximum output current (i out(max) ) given the switching frequency, and maximum input voltage used in the desired application. in order to achieve higher light load efficiency, more energy must be delivered to the output during the single small pulses in burst mode operation such that the LT8614 can stay in sleep mode longer between each pulse. this can be achieved by using a larger value inductor (i.e., 4.7 h), and should be considered independent of switching frequency when choosing an inductor. for example, while a lower inductor value would typically be used for a high switch - ing frequency application, if high light load efficiency is desired, a higher inductor value should be chosen. see curve in typical performance characteristics. the optimum inductor for a given application may differ from the one indicated by this design guide. a larger value inductor provides a higher maximum load current and reduces the output voltage ripple. for applications requir - ing smaller load currents, the value of the inductor may be lower and the LT8614 may operate with higher ripple current. this allows use of a physically smaller inductor, or one with a lower dcr resulting in higher efficiency. be aware that low inductance may result in discontinuous mode operation, which further reduces maximum load current. for more information about maximum output current and discontinuous operation, see linear technologys application note 44. finally, for duty cycles greater than 50% (v out /v in > 0.5), a minimum inductance is required to avoid sub-harmonic oscillation. see application note 19. input capacitors the v in of the LT8614 should be bypassed with at least three ceramic capacitors for best performance. tw o small ceramic capacitors of 1 f should be placed close to the part; one at the v in1 /gnd1 pins and a second at v in2 /gnd2 pins. these capacitors should be 0402 or 0603 in size. for automotive applications requiring 2 series input capaci - tors, two small 0402 or 0603 may be placed at each side of the LT8614 near the v in1 /gnd1 and v in2 /gnd2 pins. a third, larger ceramic capacitor of 2.2 f or larger should be placed close to v in1 or v in2 . see layout section for more detail. x7r or x5r capacitors are recommended for best performance across temperature and input voltage variations. note that larger input capacitance is required when a lower switching frequency is used. if the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. this can be provided with a low performance electrolytic capacitor. LT8614 8614fa
17 for more information www.linear.com/LT8614 a pplica t ions i n f or m a t ion a ceramic input capacitor combined with trace or cable inductance forms a high quality ( under damped) tank cir- cuit. if the LT8614 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8614s voltage rating. this situation is easily avoided ( see linear technology application note 88). output capacitor and output ripple the output capacitor has two essential functions. along with the inductor, it filters the square wave generated by the LT8614 to produce the dc output. in this role it determines the output ripple, thus low impedance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the LT8614s control loop. ceramic capacitors have very low equivalent series resistance ( esr) and provide the best ripple performance. for good starting values, see the typical applications section. use x5r or x7r types. this choice will provide low output ripple and good transient response. transient performance can be improved with a higher value output capacitor and the addition of a feedforward capacitor placed between v out and fb. increasing the output capacitance will also decrease the output voltage ripple. a lower value of output capacitor can be used to save space and cost but transient performance will suffer and may cause loop instability. see the typical applications in this data sheet for suggested capacitor values. when choosing a capacitor, special attention should be given to the data sheet to calculate the effective capacitance under the relevant operating conditions of voltage bias and temperature. a physically larger capacitor or one with a higher voltage rating may be required. ceramic capacitors ceramic capacitors are small, robust and have very low esr. however, ceramic capacitors can cause problems when used with the LT8614 due to their piezoelectric nature. when in burst mode operation, the LT8614s switching frequency depends on the load current, and at very light loads the LT8614 can excite the ceramic capacitor at audio frequencies, generating audible noise. since the LT8614 operates at a lower current limit during burst mode op - eration, the noise is typically very quiet to a casual ear. if this is unacceptable, use a high performance tantalum or electrolytic capacitor at the output . low noise ceramic capacitors are also available. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LT8614. as previously mentioned , a ceramic input capacitor combined with trace or cable inductance forms a high quality ( un- derdamped) tank circuit. if the LT8614 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8614s rating. this situation is easily avoided ( see linear technology application note 88). enable pin the LT8614 is in shutdown when the en pin is low and active when the pin is high. the rising threshold of the en comparator is 1.0 v, with 40 mv of hysteresis. the en pin can be tied to v in if the shutdown feature is not used, or tied to a logic level if shutdown control is required. adding a resistor divider from v in to en programs the LT8614 to regulate the output only when v in is above a desired voltage ( see the block diagram). typically, this threshold, v in(en) , is used in situations where the input supply is current limited, or has a relatively high source resistance. a switching regulator draws constant power from the source, so source current increases as source voltage drops. this looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. the v in(en) threshold prevents the regulator from operating at source voltages where the problems might occur. this threshold can be adjusted by setting the values r3 and r4 such that they satisfy the following equation: v in(en) = r3 r4 + 1 ? ? ? ? ? ? 1.0v (10) where the LT8614 will remain off until v in is above v in(en) . due to the comparators hysteresis, switching will not stop until the input falls slightly below v in(en) . LT8614 8614fa
18 for more information www.linear.com/LT8614 a pplica t ions i n f or m a t ion when operating in burst mode operation for light load currents, the current through the v in(en) resistor network can easily be greater than the supply current consumed by the LT8614. therefore, the v in(en) resistors should be large to minimize their effect on efficiency at low loads. intv cc regulator an internal low dropout ( ldo) regulator produces the 3.4 v supply from v in that powers the drivers and the internal bias circuitry. the intv cc can supply enough current for the LT8614s circuitry and must be bypassed to ground with a minimum of 1 f ceramic capacitor. good bypassing is necessary to supply the high transient currents required by the power mosfet gate drivers. to improve efficiency the internal ldo can also draw current from the bias pin when the bias pin is at 3.1 v or higher. typically the bias pin can be tied to the output of the LT8614, or can be tied to an external supply of 3.3 v or above. if bias is connected to a supply other than v out , be sure to bypass with a local ceramic capacitor. if the bias pin is below 3.0v, the internal ldo will consume current from v in . applications with high input voltage and high switching frequency where the internal ldo pulls current from v in will increase die temperature because of the higher power dissipation across the ldo. do not connect an external load to the intv cc pin. output voltage tracking and soft-start t he LT8614 allows the user to program its output voltage ramp rate by means of the tr/ ss pin. an internal 2.2a pulls up the tr/ ss pin to intv cc . putting an external capacitor on tr/ss enables soft starting the output to pre- vent current surge on the input supply. during the soft- start ramp the output voltage will proportionally track the tr/ ss pin voltage. for output tracking applications, tr / ss can be externally driven by another voltage source. from 0 v to 0.97v, the tr/ss voltage will override the internal 0.97v reference input to the error amplifier, thus regulating the fb pin voltage to that of tr/ss pin. when tr/ss is above 0.97v , tracking is disabled and the feedback voltage will regulate to the internal reference voltage. the tr / ss pin may be left floating if the function is not needed. an active pull- down circuit is connected to the tr/ss pin which will discharge the external soft-start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. fault conditions that clear the soft-start capacitor are the en/uv pin transitioning low, v in voltage falling too low, or thermal shutdown. output power good when the LT8614s output voltage is within the 9% window of the regulation point, which is a v fb voltage in the range of 0.883 v to 1.057v ( typical), the output voltage is considered good and the open-drain pg pin goes high impedance and is typically pulled high with an external resistor. otherwise, the internal pull-down device will pull the pg pin low. to prevent glitching both the upper and lower thresholds include 1.2% of hysteresis. the pg pin is also actively pulled low during several fault conditions: en/uv pin is below 1 v, intv cc has fallen too low, v in is too low, or thermal shutdown. synchronization to select low ripple burst mode operation, tie the sync pin below 0.4v ( this can be ground or a logic low output). to synchronize the LT8614 oscillator to an external frequency connect a square wave (with 20% to 80% duty cycle ) to the sync pin. the square wave amplitude should have val- leys that are below 0.4 v and peaks above 2.4v ( up to 6v). the LT8614 will not enter burst mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. the LT8614 may be synchronized over a 200 khz to 3 mhz range. the r t resistor should be chosen to set the LT8614 switching frequency equal to or below the lowest synchronization input. for example, if the synchronization signal will be 500khz and higher, the r t should be selected for 500khz. the slope compensation is set by the r t value, while the minimum slope compensation required to avoid subhar- monic oscillations is established by the inductor size, input voltage, and output voltage. since the synchroniza- tion frequency will not change the slopes of the inductor current waveform, if the inductor is large enough to avoid LT8614 8614fa
19 for more information www.linear.com/LT8614 a pplica t ions i n f or m a t ion subharmonic oscillations at the frequency set by r t , then the slope compensation will be sufficient for all synchro- nization frequencies. for some applications it is desirable for the LT8614 to operate in pulse-skipping mode, offering two major differ - ences from burst mode operation. first is the clock stays awake at all times and all switching cycles are aligned to the clock. second is that full switching frequency is reached at lower output load than in burst mode operation. these two differences come at the expense of increased quiescent current. to enable pulse-skipping mode, the sync pin is tied high either to a logic output or to the intvcc pin. the LT8614 does not operate in forced continuous mode regardless of sync signal. never leave the sync pin floating. shorted and reversed input protection the LT8614 will tolerate a shorted output. several features are used for protection during output short-circuit and brownout conditions. the first is the switching frequency will be folded back while the output is lower than the set point to maintain inductor current control. second, the bottom switch current is monitored such that if inductor current is beyond safe levels switching of the top switch will be delayed until such time as the inductor current falls to safe levels. frequency foldback behavior depends on the state of the sync pin: if the sync pin is low the switching frequency will slow while the output voltage is lower than the pro - grammed level. if the sync pin is connected to a clock source or tied high, the LT8614 will stay at the programmed frequency without foldback and only slow switching if the inductor current exceeds safe levels. there is another situation to consider in systems where the output will be held high when the input to the LT8614 is absent. this may occur in battery charging applications or in battery-backup systems where a battery or some other supply is diode ored with the LT8614s output. if the v in pin is allowed to float and the en pin is held high (either by a logic signal or because it is tied to v in ), then the LT8614 s internal circuitry will pull its quiescent current through its sw pin. this is acceptable if the system can tolerate several a in this state. if the en pin is grounded the sw pin current will drop to near 1 a. however, if the v in pin is grounded while the output is held high, regard- less of en, parasitic body diodes inside the LT8614 can pull current from the output through the sw pin and the v in pin. figure 4 shows a connection of the v in and en/uv pins that will allow the LT8614 to run only when the input voltage is present and that protects against a shorted or reversed input. figure 4. reverse v in protection v in v in d1 LT8614 en/uv 8614 f04 gnd high temperature considerations for higher ambient temperatures, care should be taken in the layout of the pcb to ensure good heat sinking of the LT8614. the ground pins on the bottom of the package should be soldered to a ground plane. this ground should be tied to large copper layers below with thermal vias; these layers will spread heat dissipated by the LT8614. placing additional vias can reduce thermal resistance further. the maximum load current should be derated as the ambient temperature approaches the maximum junction rating. power dissipation within the LT8614 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the inductor loss. the die temperature is calculated by multiplying the LT8614 power dissipation by the thermal resistance from junction to ambient. the LT8614 will stop switching and indicate a fault condition if safe junction temperature is exceeded. LT8614 8614fa
20 for more information www.linear.com/LT8614 5v 4a step-down converter 3.3v, 4a step-down converter v in2 v in1 en/uv pg LT8614 8614 ta08 bst sync/mode sw tr/ss bias intv cc fb rt gnd 0.1f 4.7pf 47f 1210 x7r 1m v out 5v 4a 1f 0603 1f 0603 4.7f v in 5.8v to 42v 10nf 41.2k 1f 4.7h 243k gnd2 gnd1 f sw = 1mhz l: ihlp2525cz-01 v in2 v in1 en/uv pg LT8614 8614 ta05 bst sync/mode sw tr/ss bias intv cc fb rt gnd 0.1f 4.7pf 47f 1210 x7r 1m v out 3.3v 4a 1f 0603 1f 0603 4.7f v in 4.1v to 42v 10nf 41.2k 1f 4.7h 412k gnd2 gnd1 f sw = 1mhz l: ihlp2525cz-01 typical a pplica t ions ultralow emi 5v, 4a step-down converter v in2 v in1 en/uv pg LT8614 8614 ta02 bst sync/mode sw tr/ss bias intv cc fb rt gnd 0.1f 4.7pf 1m 47f 1210 x7r v out 5v 4a 1f 0603 1f 0603 4.7f 1206 v in 5.8v to 42v 10nf 18.2k 1f f sw = 2mhz fb1 bead: mpz20125300a l, l2: ihlp2525cz-01 2.2h l2 6.8h fb1 bead 243k 10f 1210 4.7f 1206 gnd2 gnd1 LT8614 8614fa
21 for more information www.linear.com/LT8614 2mhz 5v, 4a step-down converter 2mhz 3.3v, 4a step-down converter v in2 v in1 en/uv pg LT8614 8614 ta03 bst sync/mode sw tr/ss bias intv cc fb rt gnd 0.1f 4.7pf 47f 1210 x7r 1m v out 5v 4a 1f 0603 1f 0603 4.7f v in 5.8v to 42v 10nf 18.2k 1f 2.2h 243k gnd2 gnd1 f sw = 2mhz l: ihlp2525cz-01 v in2 v in1 en/uv pg LT8614 8614 ta06 bst sync/mode sw tr/ss bias intv cc fb rt gnd 0.1f 4.7pf 47f 1210 x7r 1m v out 3.3v 4a 1f 0603 1f 0603 4.7f v in 4.1v to 42v 10nf 18.2k 1f 1.5h 412k gnd2 gnd1 f sw = 2mhz l: ihlp2020cz-01 typical a pplica t ions LT8614 8614fa
22 for more information www.linear.com/LT8614 p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 1.50 ref 4.00 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 5) 0.40 0.10 pin 1 id 0.12 45 0.356 0.05 0.220 0.05 0.400 0.05 0.770 bsc 0.770 bsc 1 2 bottom view?exposed pad 2.50 ref 2.127 0.10 0.75 0.05 r = 0.110 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (udc18) qfn 1213 rev b recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.25 0.05 2.50 ref 3.10 0.05 4.50 0.05 1.50 ref 0.356 0.05 0.055 bsc 0.400 0.05 0.220 0.05 2.10 0.05 3.50 0.05 package outline 0.50 bsc udc package 18-lead plastic qfn (3mm 4mm) (reference ltc dwg # 05-08-1956 rev b) exposed pad variation aa LT8614 8614fa
23 for more information www.linear.com/LT8614 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 03/14 clarified package description. clarified applications information. clarified applications components. clarified rev of package drawing. clarified related parts list. 2 13 20, 21, 24 22 24 LT8614 8614fa
24 for more information www.linear.com/LT8614 ? linear technology corporation 2013 lt 0314 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LT8614 r ela t e d p ar t s typical a pplica t ions part number description comments lt8610 42v, 2.5a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 2.5a v in : 3.4v to 42v, v out(min) = 0.97v, i q = 2.5a, i sd < 1a, msop-16e package lt8610a/lt8610ab 42v, 3.5a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 2.5a v in : 3.4v to 42v, v out(min) = 0.97v, i q = 2.5a, i sd < 1a, msop-16e package lt8611 42v, 2.5a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 2.5a and input/output current limit/monitor v in : 3.4v to 42v, v out(min) = 0.97v, i q = 2.5a, i sd < 1a, 3mm 5mm qfn-24 package lt8612 42v, 6a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 3a v in : 3.4v to 42v, v out(min) = 0.97v, i q = 2.5a, i sd < 1a, 3mm 6mm qfn package lt3971 38v, 1.2a, 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.8a v in : 4.2v to 38v, v out(min) = 1.21v, i q = 2.8a, i sd < 1a, 3mm 3mm dfn-10 and msop-10e packages lt3991 55v, 1.2a, 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.8a v in : 4.2v to 55v, v out(min) = 1.21v, i q = 2.8a, i sd < 1a, 3mm 3mm dfn-10 and msop-10e packages lt3970 40v, 350ma, 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.5a v in : 4.2v to 40v, v out(min) = 1.21v, i q = 2.5a, i sd < 1a, 3mm 2mm dfn-10 and msop-10 packages lt3990 62v, 350ma, 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.5a v in : 4.2v to 62v, v out(min) = 1.21v, i q = 2.5a, i sd < 1a, 3mm 3mm dfn-10 and msop-6e packages 12v, 4a step-down converter 2mhz 1.8v, 4a step-down converter v in2 v in1 en/uv pg LT8614 8614 ta04 bst sync/mode sw tr/ss bias intv cc fb rt gnd 0.1f 4.7pf 47f 1210 1m v out 12v 4a 1f 0603 1f 0603 4.7f v in 12.8v to 42v 10nf 41.2k 1f 4.7h 88.7k gnd2 gnd1 f sw = 1mhz l: ihlp2525cz-01 v in2 v in1 en/uv pg LT8614 8614 ta07 bst sync/mode sw tr/ss bias intv cc fb rt gnd 0.1f external source >3.1v or gnd 100f 1210 10pf 866k v out 1.8v 4a 1f 0603 1f 0603 4.7f v in 3.4v to 22v (42v transient) 10nf 18.2k 1f 1h 1m gnd2 gnd1 f sw = 2mhz l: ihlp2020cz-01 LT8614 8614fa

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